09-11, 13:20–13:40 (Europe/Berlin), Main KiCon Presentation Space
With ngspice integration in KiCad, simulations have never been more accessible in KiCad. But when the design gets complex, managing the simulations is complex. This talk presents a new methodology, enabled by AmpereBrain, that establishes a single, unified schematic as the source of truth for both design and multiple simulation scenarios. We will demonstrate a workflow centered on logically grouping components within your schematic. By programmatically activating these groups, you can define precise simulation boundaries on the fly, while the tool automatically filters out components irrelevant to the simulation. This structured approach is the key to enabling robust, repeatable simulation and paving the way for a true CI/CD workflow for hardware development.
This session will provide a practical guide to eliminating the need for separate design and simulation schematics. We will demonstrate how to use a single source of truth for your design while supporting multiple, complex simulation scenarios.
The talk will be structured as follows:
The Problem: A Tale of Two Schematics (5 min): We'll begin by outlining the common pain points of the traditional workflow: design-for-layout vs. design-for-simulation, the difficulty of managing simulation-only components, and the risk of the two schematics drifting apart over time.
The Solution: Simulation as a View, Not a File (10 min): We will introduce the core concept of our approach: treating simulation setup as a "view" of your main schematic. Instead of editing files, you define logical blocks using KiCad's grouping feature. We'll show how AmpereBrain:
Uses these named groups (e.g., "Power Supply," "Amplifier Stage," "Digital Logic") as the building blocks for simulation.
Allows you to define a simulation run by simply selecting which groups to include.
Automatically identifies and excludes components that are irrelevant to simulation, such as parts marked "DNP" (Do Not Populate), mounting hardware, and fiducials, ensuring a clean netlist without manual intervention.
Live Demo: Multi-Simulation Management (10 min): A live demonstration of the workflow in action. We will take a standard amplifier circuit and perform several simulation runs from the same schematic:
DC Operating Point: We'll run a baseline simulation including the "Power Supply" and "Amplifier Stage" groups.
AC Analysis: We will then define a new simulation view that excludes the "Power Supply" group and includes an "AC Source" group to perform a frequency response analysis on the amplifier.
Noise Analysis: Finally, we'll show how to simulate only the "Amplifier Stage" group to isolate and analyze its noise performance without interference from other circuit blocks.
The Future: CI/CD for Hardware and AI-Driven TDD (5 min): We'll conclude by connecting this methodology to the future of hardware development.
Bringing CI/CD to Hardware: By defining simulation setups as code, we can create a "simulation test suite." This allows for automated, repeatable verification of circuit performance, much like a CI/CD pipeline in software. We can even introduce metrics like "simulation coverage" to ensure all critical blocks are tested, where the results sit as part of the ERC.
AI-Generated Tests: The next step is to use AI to automate the creation of this test suite. We envision an AI that reads the project requirements and automatically generates the necessary simulation configurations to verify them, effectively enabling Test-Driven Development (TDD) for hardware design.
Founder of the StepUp companies, building wearables. Following closely the AI revolution.